by | Jan 20, 2026

  • P. Parate, D. Sharma, A. Shaju and M. Rao, “Hierarchical Optimization of Karatsuba Multipliers for ECDSA Hardware Accelerators,” 2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Kalamata, Greece, 2025, pp. 1-6, doi: 10.1109/ISVLSI65124.2025.11130284